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SGM800 low-power, sot p reset circuit with capacitor-adjustable reset timeout delay general description the SGM800 low-power micro-processor supervisor circuit monitors system voltages from 1.6v to 5v. this device performs a single function: it asserts a reset signal whenever the v cc supply voltage falls below its reset threshold. the reset output remains asserted for the reset timeout period after v cc rises above the reset threshold. the reset timeout is externally set by a capacitor to provide more flexibility. the SGM800 has an active-low, open-drain reset output. it is available in green sot-23-5 package and is specified over an ambient temperature range of -40 to +85 . features ? monitor system voltages from 1.6v to 5v ? capacitor-adjustable reset timeout period ? low quiescent current (3a typ) ? open-drain reset output option ? guaranteed reset valid to v cc = 1v ? immune to short v cc transients ? available in green sot-23-5 package applications portable equipment battery-powered computers/controllers automotive medical equipment intelligent instruments embedded controllers critical p monitoring set-top boxes computers typical application microprocessor system gnd SGM800 reset reset gnd v cc v cc srt c srt rev. a . 1 sg micro corp www.sg-micro.com
low-power, sot p reset circuit with SGM800 capacitor-ad justable reset timeout delay 2 sg micro corp www.sg-micro.com package/ordering information model pin-package reset threshold (typ) ordering number package marking package option 1.63v SGM800-1.63yn5g/tr s69xx tape and reel, 3000 2.32v SGM800-2.32yn5g/tr s6axx tape and reel, 3000 2.63v SGM800-2.63yn5g/tr s6bxx tape and reel, 3000 SGM800 sot-23-5 2.93v SGM800-2.93yn5g/tr s6cxx tape and reel, 3000 note: order number and package mark ing are defined as the follow: order number SGM800 - x x x g / tr package type tape and reel n5 sot-23-5 operating temperature range y -40 to +85 reset threshold 1.63 1.63v 2.32 2.32v 2.63 2.63v 2.93 2.93v green product marking information for example: s69ba (2011, january) syy x x date code - year ("a" = 2010, "b" = 2011 ) date code - month ("a" = jan. "b" = feb. "l" = dec.) chip i.d. absolute maximum ratings all voltages referenced to gnd v cc .............................................................................-0.3v to 6v reset (open-drain)....... .................... .................... ..-0.3v to 6v input current (all pins). ..................... ..................... .............20ma output current ( reset ) ....................................................20ma operating temperature range ...........................-40 to +85 storage temperature range ............................-65 to +150 junction temperature........................................................150 lead temperature (soldering, 10s) ..................................260 esd susceptibility hbm.................... ..................... ...................... .................. 3000v mm......................................................................................300v note: stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the s pecifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. caution this integrated circuit can be damaged by esd if you don?t pay attention to esd protection. sgmicro recommends that all integrated circuits be handled with appropriate precautions. failure to observe proper handling and installation procedures can cause damage. esd damage can range from subtle performance degradation to complete device failure. precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. sgmicro reserves the right to make any change in circuit design, specification or other related things if necessary without notice at any time. please contact sgmicro sales office to get the latest datasheet.
low-power, sot p reset circuit with SGM800 capacitor-ad justable reset timeout delay 3 sg micro corp www.sg-micro.com pin configuration (top view) sot-23-5 1 2 3 4 5 srt gnd n.c. v cc reset SGM800 pin description pin name function 1 srt set reset timeout input. connect a capacitor between srt and ground to set the timeout period. determine the period as follows: t rp = 2.6 10 6 c srt + 340 10 -6 with t rp in seconds and c srt in farads. 2 gnd ground. 3 n.c. not internally connected. can be connected to gnd. 4 v cc supply voltage and reset threshold monitor input. 5 reset reset changes from high to low whenever v cc drops below the selected reset threshold voltage. reset remains low for the reset timeout period after v cc exceeds the reset threshold.
low-power, sot p reset circuit with SGM800 capacitor-ad justable reset timeout delay 4 sg micro corp www.sg-micro.com electrical characteristics (v cc = 1v to 5.5v, t a = -40 to +85 , typical values are at v cc = 5v and t a = +25 , unless otherwise specified.) parameter symbol conditions min typ max units supply voltage range v cc 1.0 5.5 v v cc 5.0v 3.9 7.0 v cc 3.3v 3.4 5.5 supply current i cc v cc 2.0v 3.0 4.8 a t a = +25 v th - 2.5% v th + 2.5% v cc reset threshold accuracy v th t a = -40 to +85 v th - 3.5% v th + 3.5% v hysteresis v hyst 4 v th mv v cc to reset delay t rd v cc falling at 1mv/s 80 s c srt = 1500pf 3.00 4.25 5.75 reset timeout period t rp c srt = 0 0.34 ms v srt ramp current i ramp v srt = 0 to 0.65v, v cc = 1.6v to 5v 210 na v srt ramp threshold v th-ramp v cc = 1.6v to 5v (v ramp rising) 0.6 v v cc 1.0v, i sink = 50a 0.3 v cc 2.7v, i sink = 1.2ma 0.3 reset output voltage low v ol v cc 4.5v, i sink = 3.2ma 0.4 v reset output leakage current, open-drain i lkg v cc > v th , reset not asserted 1 a
low-power, sot p reset circuit with SGM800 capacitor-ad justable reset timeout delay 5 sg micro corp www.sg-micro.com typical performance characteristics v cc = 5v, c srt = 1500pf, t a = +25 , unless otherwise noted. supply current vs. supply voltage 0 1 2 3 4 5 0123456 supply voltage (v) supply current ( a) -40 +25 +85 v th = 1.63v reset timeout period vs. temperature 300 340 380 420 460 500 -50 -25 0 25 50 75 100 temperature ( ) reset timeout period ( s) c srt = 0 normalized reset threshold vs. temperature 0.994 0.996 0.998 1.000 1.002 1.004 1.006 -50 -25 0 25 50 75 100 temperature ( ) normalized reset threshold reset timeout period vs. c srt 0.1 1 10 100 1000 10000 0.01 0.1 1 10 100 1000 c srt (nf) reset timeout period (ms) reset timeout period vs. temperature 4.0 4.2 4.4 4.6 4.8 5.0 -50 -25 0 25 50 75 100 temperature ( ) reset timeout period (ms) c srt = 1500pf maximum transient duration vs. reset threshold overdrive 0 10 20 30 40 50 60 0 200 400 600 800 1000 reset threshold overdrive (mv) transient duration (s) v th = 2.93v
low-power, sot p reset circuit with SGM800 capacitor-ad justable reset timeout delay 6 sg micro corp www.sg-micro.com typical performance characteristics v cc = 5v, c srt = 1500pf, t a = +25 , unless otherwise noted.
low-power, sot p reset circuit with SGM800 capacitor-ad justable reset timeout delay 7 sg micro corp www.sg-micro.com detailed description reset output the reset output is typically connected to the reset input of a p. a p?s reset input starts or restarts the p in a known state. the SGM800 p supervisory circuit provides the reset logic to prevent code-execution errors during power-up, power-down, and brownout conditions. reset changes from high to low whenever v cc drops below the threshold voltage. once v cc exceeds the threshold voltage, reset remains low for the capacitor- adjustable reset timeout period. this device output is guaranteed valid for v cc > 1v. the SGM800 is open-drain reset output. connect an external pull up resistor to any supply from 0 to 5.5v. select a resistor value large enough to register a logic low when reset is asserted and small enough to register a logic high while supplying all input current and leakage paths connected to the reset line. a 10k ? to 100k ? pull up is sufficient in most applications. selecting a reset capacitor the reset timeout period is adjustable to accommodate a variety of p applications. adjust the reset timeout period (t rp ) by connecting a capacitor (c srt ) between srt and ground. calculate the reset timeout capacitor as follows: c srt = (t rp - 340 10 -6 ) / (2.6 10 6 ) where t rp is in seconds and c srt is in farads. the reset delay time is set by a current/capacitor- controlled ramp compared to an internal 0.6v reference. an internal 210na ramp current source charges the external capacitor. the charge to the capacitor is cleared when a reset condition is detected. once the reset condition is removed, the vo ltage on the capacitor ramps according to the formula: dv/dt = i/c. the c srt capacitor must ramp to 0.6v to deassert the reset. c srt must be a low-leakage (<10na) type capacitor; ceramic is recommended. operating as a voltage detector the SGM800 can be operated in a voltage detector mode by floating the srt pin. the reset delay times for v cc rising above or falling below the threshold are not significantly different. the reset output is deasserted smoothly without false pulses.
low-power, sot p reset circuit with SGM800 capacitor-ad justable reset timeout delay 8 sg micro corp www.sg-micro.com application information interfacing to other voltages for logic compatibility the open-drain output of the SGM800 can be used to interface to ps with other logic levels. as shown in figure 1, the open-drain output can be connected to voltages from 0 to 5.5v. this allows for easy logic compatibility to various ps. + - v ref v cc 3.3v reset timeout reset srt gnd c srt SGM800 5.0v 10k 5v system figure 1. open-drain reset output allows use with multiple supplies negative-going v cc transients in addition to issuing a reset to the p during power-up, power-down, and brownout conditions, this supervisor is relatively immune to short-duration negative-going transients (glitches). the graph maximum transient duration vs. reset threshold overdrive in the typical performance characteristics shows this relationship. the area below the curve of the graph is the region in which these devices typically do not generate a reset pulse. this graph was generated using a negative-going pulse applied to v cc , starting above the actual reset threshold (v th ) and ending below it by the magnitude indicated (reset-threshold overdrive). as the magnitude of the transient decreases (further below the reset threshold), the maximum allowable pulse width- decreases. typically, a v cc transient that goes 100mv below the reset threshold and lasts 50s or less does not cause a reset pulse to be issued. wired-or reset to allow auxiliary circuitry to hold the system in reset, an external open-drain logic signal can be connected to the open-drain reset of the SGM800, as shown in figure 2. this configuration can reset the p, but does not provide the reset timeout when the external logic signal is released. reset p reset v cc v cc open-drain logic n n 10k gnd SGM800 figure 2. wired-or reset circuit layout consideration srt is a precise current source. when developing the layout for the application, be careful to minimize board capacitance and leakage currents around this pin. traces connected to srt should be kept as short as possible. traces carrying high-speed digital signals and traces with large voltage potentials should be routed as far from srt as possible. leakage current and stray capacitance (e.g., a scope probe) at this pin could cause errors in the reset timeout period. when evaluating these parts, use clean prototype boards to ensure accurate reset periods.
low-power, sot p reset circuit with SGM800 capacitor-ad justable reset timeout delay 9 sg micro corp www.sg-micro.com package outline dimensions sot-23-5 e e1 e e1 b d a1 a2 a c l 0.2 recommended land pattern (unit: mm) 1.90 2.59 0.99 0.69 0.95 dimensions in millimeters dimensions in inches symbol min max min max a 1.050 1.250 0.041 0.049 a1 0.000 0.100 0.000 0.004 a2 1.050 1.150 0.041 0.045 b 0.300 0.500 0.012 0.020 c 0.100 0.200 0.004 0.008 d 2.820 3.020 0.111 0.119 e 1.500 1.700 0.059 0.067 e1 2.650 2.950 0.104 0.116 e 0.950 bsc 0.037 bsc e1 1.900 bsc 0.075 bsc l 0.300 0.600 0.012 0.024 0 8 0 8
low-power, sot p reset circuit with SGM800 capacitor-ad justable reset timeout delay 10 sg micro corp www.sg-micro.com tape and reel information note: the picture is only for reference. please make the object as the standard. key parameter list of tape and reel package type reel diameter reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p0 (mm) p1 (mm) p2 (mm) w (mm) pin1 quadrant sot-23-5 7 9.5 3.2 3.2 1.4 4.0 4.0 2.0 8.0 q3 reel width (w1) reel diameter reel dimensions tape dimensions direction of feed p2 p0 w p1 a0 k0 b0 q1 q2 q4 q3 q3 q4 q2 q1 q3 q4 q2 q1
low-power, sot p reset circuit with SGM800 capacitor-ad justable reset timeout delay 11 sg micro corp www.sg-micro.com carton box dimensions note: the picture is only for reference. please make the object as the standard. key parameter list of carton box reel type length (mm) width (mm) height (mm) pizza/carton 7 (option) 368 227 224 8 7 442 410 224 18

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